Semi-conductor components, e.g. corresponding integrated (analog and/or digital) computing circuits, semi-conductor memory components such as function storage components (PLAs, PALs, etc.) and table memory-components (e.g. ROMs and RAMs, in particular SRAMs and DRAMs), etc. are subjected—e.g. while in a semi-completed and/or a completed state—to numerous tests at several test stations.
For testing the semi-conductor components, a corresponding semi-conductor component test apparatus may be provided, which generates the test signals for testing the semi-conductor components at the test station in question.
For instance the signals required for testing the semi-conductor components still present on the corresponding wafer, may—at a first test station—for instance be generated by a test apparatus connected to a corresponding semi-conductor component test card (“probe card”) and sent to the relevant pads of the semi-conductor components by means of corresponding needle-shaped connections (“contact pins”) provided on the test card.
The signals emitted by the semi-conductor components to corresponding pads in response to the input test signals, are scanned by corresponding, needle-shaped connections (“contact pins”) on the probe card, and relayed (e.g. via a corresponding signal line connecting the probe card with the test apparatus) to the test apparatus where an evaluation of the corresponding signals may take place.
After the wafer has been sawn up, the components—individually available by now—may be individually loaded into so-called carriers (i.e. into an appropriate container) and transported to a further test station.
At the further test station the carriers are inserted into a corresponding adapter and/or socket—connected to a (further) test apparatus—whereafter the components present in each carrier are then subjected to further test procedures.
In order to test the semi-conductor components present in the carriers the corresponding test signals generated by the test apparatus are relayed via the adapters and the carriers (and/or corresponding connections of the carriers) to the corresponding pads of the relevant semi-conductor components.
The signals emitted by the semi-conductor components at corresponding pads in response to the input test signals are scanned by corresponding carrier connections and relayed via the adapter (and a corresponding signal line connecting the adapter to the test apparatus) to the test apparatus, where an evaluation of corresponding signals may take place.
In correspondingly similar fashion the semi-conductor components may be tested for instance after being finally installed in corresponding component housings (e.g. corresponding plug-in or surface mounted housings) and/or after the housings—provided with corresponding semi-conductor components—have been installed in corresponding electronic modules, etc.
In order to achieve a high degree of accuracy in the above test procedures (in particular a high degree of accuracy in the test signals used and/or measured during the above test procedures), the relevant test apparatus may be subjected—before the start of the actual test procedure—to a calibration and/or set-up process.
For instance, a corresponding calibration signal may be emitted onto a signal line connecting the corresponding test apparatus with the relevant probe card, the relevant adapter etc. (e.g. the relevant carrier or housing adapter) by the relevant test apparatus, and the reflected signal induced by the calibration signal measured and evaluated by the test apparatus.
This process is relatively inaccurate.
Alternatively a so-called point-to-point-calibration and/or point-to-point set-up process may be used.
In this process the calibration signal emitted by the test apparatus onto the above signal line (e.g. by a corresponding calibration device) is measured and evaluated there—or approximately there—where it would have been received in each case by the relevant component during the later, actual test.
In this way it can be ensured that the signals received from the relevant component by the test apparatus—during the later, actual test—correspond with the test signals required for each relevant test (with as close to exactly the voltage levels required in each case and/or close to exactly the time behavior required, etc.).
The testing of semi-conductor components still present on a corresponding wafer with the aid of the above probe cards (and similarly also the calibration of the test apparatus used in each case) may take place in a sub-system (e.g. in a corresponding micro clean room system) isolated from the environment.
In order to perform the above calibration and/or set-up process, the relevant test apparatus is connected—via a corresponding signal line—with a corresponding device (movable within the sub-system) containing several (e.g. three) needle-shaped connections and/or contact pins (e.g. a SPP=short pin plate).
For calibrating the test apparatus, the SPP (short pin plate) is moved towards a calibration device (e.g. an NAC=needle auto-calibration device), in particular its NAC plate (needle auto-calibration plate) in such a way that the connections and/or contact pins of the SPP—as required in each case—make contact with the connections (pads) of the (NAC) calibration device—as required in each case—(and/or the connections of its needle plate (needle auto calibration plate) as required in each case).
A calibration signal emitted by the test apparatus—via the above signal line—may then be measured and evaluated by the calibration device.
In correspondingly inverted fashion, a (further) calibration signal emitted by the calibration device (via a corresponding NAC pad and a corresponding SPP contact pin) may be relayed to the test apparatus to be measured and evaluated there.
After the calibration of the test apparatus, the SPP may then again be removed from the NAC device, in particular from the NAC plate, whereafter e.g. a corresponding probe card calibration and/or set-up process may be performed.
For this, the probe card (correspondingly similar to the above SPP) may be moved towards the above calibration device (NAC device, in particular its NAC plate (needle auto calibration plate)) in such a way that the connections and/or contact pins of the probe card—as required in each case—make contact with the requisite connections (pads) of the calibration device in each case.
A corresponding calibration signal emitted by the calibration device (NAC device) is then relayed via a corresponding NAC pad—and a corresponding probe card contact pin in contact with it—to the probe card.
The signal emitted by the probe card in response to the input calibration signal to a corresponding contact pin, is scanned by a corresponding NAC pad—which is in contact with the contact pin—and then measured and evaluated by the calibration device.
One disadvantage inter alia of the above procedure is that during the calibration of the test apparatus the calibration signals need to be relayed via additional pins (namely the above SPP contact pins), which may lead to inaccuracies.